Tag Archives: IPHI

Infographic – memory buying guide for Romley 2-socket servers

For servers based on the Intel plan of record

UPDATE: 06/30/2012: v1.21 – added 1333MHz/1600MHz speed info
UPDATE: 06/30/2012: v1.21_ibmsys_1_0 – IBM System x memory
UPDATE: 07/01/2012: v1.21_ibmsys_1_1 – IBM System x memory
UPDATE: 07/06/2012 – non-viability of LRDIMMs
UPDATE: 07/06/2012 – viability of HyperCloud

Here is a graphical illustration of how to choose memory for 2-socket Romley servers.

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Where are the 1600MHz LRDIMMs/HyperCloud for Romley ?

Load reduction and rank multiplication at 1600MHz ?

1600MHz-rated 16GB RDIMMs (2-rank) are available for Romley – why not LRDIMM/HyperCloud ?

The reason maybe that load reduction and rank multiplication manufacturers are already outperforming the RDIMMs by ONE speed grade.

Offering a 1600MHz version that offers a FURTHER speed grade advantage, while advantageous to end-users, may not offer a greater-units-sold advantage to the manufacturers of load reduction and rank multiplication solutions.

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Is HyperCloud vs. LRDIMMs similar to Betamax vs VHS ?

Betamax vs VHS all over again ?

The choice of load reduction and rank multiplication memory – whether HyperCloud or LRDIMMs – may seem superficially like another such “standards battle” – that of Betamax vs. VHS (where the inferior technology won out because of market conditions).

This may superficially seem to be the situation with memory choices – but it is not.

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Why are LRDIMMs single-sourced by Inphi ?

Inphi as a single point of failure

UPDATE: added 06/21/2012: added info on Montage
UPDATE: 07/06/2012 – now a Montage 1333MHz version like Inphi

The top 3 buffer chipset makers are Inphi, IDTI and Texas Instruments.

However Inphi is the only supplier of “iMB” LRDIMM buffer chipsets for Romley.

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DDR4 borrows from LRDIMM use of load reduction

A combination of lower voltages and higher speeds

DDR3 memory already has trouble achieving the faster speeds at high memory loading.

As you add memory modules on a memory channel (go from 1 DPC to 2 DPC to 3 DPC), the max achievable speeds go down.

At lower voltage (1.35V), the max achievable speeds go down further:

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JEDEC fiddles with DDR4 while LRDIMM burns

JEDEC and DDR4 finalization

UPDATE: 06/10/2012: this article was slashdotted today
UPDATE: 07/24/2012: added Netlist on JEDEC BOD

While JEDEC has time before they finalize the DDR4 standard to secure relevant IP, they did not exercise similar concern when they finalized the LRDIMM standard.

LRDIMMs were standardized without securing the relevant IP.

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Market opportunity for load reduction

Industry estimates of “attach rates”

UPDATE: added 06/19/2012: IDTI comments
UPDATE: added 06/22/2012: analysts on attach rates
UPDATE: added 07/03/2012: Netlist conservative $500M revenue estimate
UPDATE: added 07/03/2012: Netlist conservative $7.5B revenue estimate for 2014
UPDATE: added 07/04/2012: isuppli.com on LRDIMM market

For DDR3, load reduction is essential at:

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Market for HCDIMMs HDIMMs

Market for load reduction

UPDATE: added 06/06/2012: info on LRDIMM market

In summary, if you follow the constraints outlined in the other articles here:

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LRDIMMs future and end-user risk factors

LRDIMMs validated by JEDEC without licensing relevant IP

LRDIMMs are based on a single-sourced “iMB” buffer chipset from Inphi (more on that below).

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Examining patent docs at USPTO

Patent and reexamination docs

This will be a simple guide to following the progress of patent and patent reexams at the USPTO.

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